1. Field of the Invention
The present invention relates generally to a monolithic type varistor functioning as a voltage non-linear resistor, and more particularly, to a monolithic type varistor in which voltage non-linearity is obtained by utilizing a Schottky barrier at the interface of a metal and a semiconductor.
2. Description of the Prior Art
Recently in various types of electronic equipment such as communication devices, miniaturization and integration of electronic components have rapidly proceeded. Correspondingly, the demand for a varistor which is miniaturized or operates a lower voltage has increased.
A monolithic type varistor has been proposed as meeting the above described demands (Japanese Patent Publication No. 23921/1983). The structure of this monolithic type varistor will be described with reference to FIG. 2.
In a monolithic type varistor 1, a plurality of inner electrodes 3a to 3d are arranged, being separated by semiconductor ceramic layers in a sintered body 2. The inner electrodes 3a and 3c are led out to one end surface of the sintered body 2 and the inner electrodes 3b and 3d are led out to the other end surface of the sintered body 2.
First and second outer electrodes 4a and 4b are respectively formed on both opposed end surfaces of the sintered body 2.
In the fabrication of the device of FIG. 2, green sheets mainly composed of semiconductor ceramics on which conductive paste for forming inner electrodes 3a to 3d is printed, are first laminated, and the laminated body obtained is pressed in the direction of thickness, and then is fired, to obtain the sintered body 2. Conductive paste is applied and baked on both opposed end surfaces of the sintered body 2 obtained, to form outer electrodes 4a and 4b, thereby to obtain a monolithic type varistor 1.
In the monolithic type varistor 1, the thickness of the each of the varistor layers 5a to 8c exhibiting voltage non-linearity can be made smaller than in the case of a single plate type varistor element. Accordingly, the monolithic type varistor 1 has the advantage that the varistor voltage can be effectively reduced.
In the monolithic type varistor 1 shown in FIG. 2, voltage non-linearity is obtained by utilizing by the varistor layers 5a to 8c arranged between the inner electrodes 3a to 3d. More specifically, it utilizes voltage non-linearity in grain boundaries between semiconductor particles in each of the varistor layers 5a to 5c. Consequently, the number of grain boundaries between semiconductor particles between the inner electrodes 3a to 3d is controlled, to control the varistor voltage, by adjusting the thickness of each of the varistor lagers 5a to 5c and the firing conditions.
With present ceramic sintering techniques, however it is very difficult to control the particle diameters of the ceramic particles With high precision. For example, particles having diameters two or more times the average particle diameter are very normally formed.
If the above described large particles exist, the varistor voltage is determined by the region in which large particles exist. Consequently the varistor voltage is liable to vary greatly in quantity production.
Furthermore, current concentrations are easily caused in the above described region where the large particles exist, and the withstandable surge current is liable to be smaller.
If the area of the inner electrode is increased, the probability of the existence of large particles becomes high. Accordingly, the withstandable surge current is increased. However, there are limitations on how much the withstandable surge current can be increased by increasing the area of the inner electrode. At present, only a withstandable surge current equivalent to that of a Zener diode, i.e., approximately 100 A, can be obtained.